1. Field of the Invention
The invention relates to the manufacture of multi-layer printed circuit boards and, more particularly, to a multi-layer printed circuit board having ground and voltage distribution plates formed integrally therein. The invention includes a structure and a method for manufacturing a multi-layer printed circuit board from a stack of single layer printed circuit boards and ground and voltage distribution plates.
2. History of the Prior Art
In the past, one technique for manufacturing multi-layer printed circuit boards includes sandwiching an insulating sheet between a plurality of single layer printed circuit boards. Each of the single layer boards includes enlarged pad areas thereon which are in spaced alignment with one another. An adhesive is placed between each one of the individual layers and then the boards are temperature and pressure laminated together to form a single, unitary, multi-layer printed circuit board. After lamination, the pad areas on the board are drilled through and the material forming the insulative board is then etched back from the hole to ensure all copper layers extend out into the hole so that subsequent plating makes electrical connection with all layers. The drilled hole is then plated through all the layers of the board to electrically interconnect the printed circuitry formed on each one of the individual layers.
An improvement in the prior art of temperature/pressure laminated multi-layer printed circuit boards is shown and claimed in U.S. Pat. No. 3,660,726 issued May 2, 1972 and assigned to the assignee of the present invention. In general, the aforementioned patent involves a technique for forming a multi-layer board by stacking a plurality of single layer printed circuit boards separated by insulative sheets, so that a plurality of plated through holes in each of the boards are axially aligned. An electrical contact, such as that used in a printed circuit card edge connector, is press fitted down through each of the aligned plated through holes. Frictional engagement of the contacts with the plated walls of the holes mechanically joins the boards into a single unitary structure and connects each one of the axially aligned conductive holes to form an electrical interconnection between the circuitry printed upon each one of the boards which is connected to a plated hole.
When printed circuit card edge connectors, such as shown in U.S. Pat. No. 3,671,917, are arrayed on a backpanel (motherboard) to receive and connect component bearing printed circuit cards (daughterboards), each contact is either unused, connected to ground potential, connected to a power supply voltage potential, or isolated from both supply voltages and grounds to carry a varying signal voltage.
Today, most of the active components mounted on daughterboards are semiconductive in nature and, hence, require relatively low power supply voltages, e.g., on the order of 2 volts above ground. However, because of the large number of such components associated with each backpanel the power supply distribution current requirements become quite large, e.g., on the order of 50-300 amps. When, for certain applications, very large currents are distributed through the printed conductive traces of an epoxy motherboard, undesirable effects may result due to the normally negligible resistance of the printed traces. For example, if there is a need to deliver a current of 300 amps at a power supply voltage of 2 volts through printed circuit board traces having a resistance of, typically, one milliohm, a voltage drop will occur in accordance with the formula: V=IR; which yields a drop of 0.30 volts. This 15% decrease in power supply voltage is an unacceptable design practice for providing a supply voltage which will reliably power the components on the daughterboard. Of course, anytime a conductor is carrying a substantial amount of current there is resistance heating and the conductor must be able to carry the required current without burning up.
Prior to the development of glass-filled epoxy printed circuit interconnecting backpanels, discrete connectors were often mounted on a relatively thick 50-60 mils metal current distribution plate. This was sometimes done by drilling rows of enlarged apertures in the plate to receive the contact tails extending from each discrete connector. Prior to placing a connector in position on a metal voltage plate, each contact tail was threaded onto either a conductive hub, if the particular contact was to electrically interconnect with the metal plate voltage; or insulative hub, if the particular contact was to be a ground or signal contact. Although such metal plate backpanel systems could distribute large amounts of current through the plate with very little IR drop, each interconnection between signal contacts had to be individually wired, a technique much more expensive and less reliable than printed circuit interconnecting backpanels. Prior art metal plate systems have inherently had a certain amount of contact resistance loss since each contact to be electrically connected to a plate is first inserted into a metal hub, introducing a certain amount of surface contact resistance, and then the hub is inserted into a hole in the plate, introducing additional contact resistance. In the present invention, contact resistance is lowered by press fitting contacts directly into bare metal holes in the current carrying plate. The present invention is concerned generally with incorporating the current carrying abilities of a metal plate system into a multi-layer printed circuit assembly.